Voltus and Azure—no power integrity challenge too big to solve
This post was co-authored by Giancarlo DiPasquale, Microsoft Director, Semiconductor & EDA; Rajat Chaudhry, Product Management Director, Cadence; and Adrian Lao, Senior Software Architect, Cadence. With the advent of AI and hyperscale designs on advanced nodes, it is common to see designs in over 50 billion transistor categories with tens to 100 billion plus nodes…